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Design and Implementation of carry select adder using T-Spice

Textbook 2016 40 Pages

Summary

Adders are the basic building blocks of any processor or data path application. In adder design, carry generation is the critical path. To reduce the power consumption of the data path, we need to reduce the area of the adder. Carry Select Adder is one of the fast adders used in may data path applications. The proposed design is implemented without using multiplexer and RCA structure with Cin=1. Instead of using multiplexer and RCA Cin=1 structure, we use simple combinational circuit. After speed, power dissipation is one of the most important design objectives in integrated circuits. As adders are the most widely used components in such circuits, the design of efficient adder is of much concern for researchers.
This study presents a performance analysis of different Fast Adders. The comparison is done on the basis of three performance parameters, i.e. Area, Speed and Power consumption. We also show a modified carry select adder designed at different stages.

Details

Pages
40
Type of Edition
Erstausgabe
Year
2016
ISBN (eBook)
9783960675587
ISBN (Book)
9783960670582
File size
4 MB
Language
English
Catalog Number
v334220
Grade
Tags
CSCA T-Splice CSLA Combinational Circuit Adder BEC D-Latch Power dissipation

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Title: Design and Implementation of carry select adder using T-Spice